can I assemble instruction using pseudo register?
can I assemble instruction using pseudo register?
I am studying reassembleable disassembly.
It is about changing the format of disassembly (generated by objdump) into a form that can be reassembled.
objdump
The problem was..
When I disassembled the binaries using objdump,
I saw following instructions:
(This is a pseudo instruction added by GCC, which is acting as a multi-byte nop.)
objdump
GCC
80493ac: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
80494b9: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi
8049b19: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi
To reassemble it, I changed the format of instruction like below:
.global main
main:
lea 0x0(%esi,%eiz,1),%esi
lea 0x0(%esi,%eiz,1),%esi
lea 0x0(%edi,%eiz,1),%edi
I saved the above file and tried to assembled it into binary.
However, it failed. The results were as follows:
$ gcc -o eiz_ex eiz_ex.s -m32
eiz_ex.s: Assembler messages:
eiz_ex.s:3: Error: bad register name '%eiz'
eiz_ex.s:4: Error: bad register name '%eiz'
eiz_ex.s:5: Error: bad register name '%eiz'
I can just substitute the instruction contains pseudo instruction to nop to make working binary.
ex) change instruction 0x0(%esi,%eiz,1),%esi to nop
nop
0x0(%esi,%eiz,1),%esi
nop
However, I want to assemble it and
get the same byte pattern as the original binary.
For examplelea 0x0(%esi,%eiz,1),%esi --assemble--> 8d 74 26 00
lea 0x0(%esi,%eiz,1),%esi
8d 74 26 00
Do you have any idea to reassemble it??
lea 0x0(%esi,%eiz,1),%esi
{disp32}
You really want actual long NOPs, rather than LEA. And if you want to change anything in the asm, you want to align to (usually) 16-byte boundaries rather than preserving the exact padding length. So if it's not too big to manually edit stuff, remove padding or replace it with a
.p2align 4 directive. (Or .p2align 4,12 to only pad if the distance is less than 12 bytes.)– Peter Cordes
Jun 30 at 7:52
.p2align 4
.p2align 4,12
Have a look at what Agner Fog's
objconv disassembler does: it's written to create asm that you can reassemble. I haven't used its AT&T output mode, but it does have one. agner.org/optimize/#objconv– Peter Cordes
Jun 30 at 7:53
objconv
FYI,
clang seems to support this, starting from around version 3.4.– Jester
Jun 30 at 10:57
clang
@PeterCordes Your advice was very helpful to my situation. Thank you very much!
– 최지원
2 days ago
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clang accepts
lea 0x0(%esi,%eiz,1),%esi(It doesn't accept a{disp32}before the mnemonic, though). So the instruction-length won't be the same.– Peter Cordes
Jun 30 at 7:46