can I assemble instruction using pseudo register?
can I assemble instruction using pseudo register? I am studying reassembleable disassembly. It is about changing the format of disassembly (generated by objdump ) into a form that can be reassembled. objdump The problem was.. When I disassembled the binaries using objdump , I saw following instructions: (This is a pseudo instruction added by GCC , which is acting as a multi-byte nop.) objdump GCC 80493ac: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi 80494b9: 8d b4 26 00 00 00 00 lea 0x0(%esi,%eiz,1),%esi 8049b19: 8d bc 27 00 00 00 00 lea 0x0(%edi,%eiz,1),%edi To reassemble it, I changed the format of instruction like below: .global main main: lea 0x0(%esi,%eiz,1),%esi lea 0x0(%esi,%eiz,1),%esi lea 0x0(%edi,%eiz,1),%edi I saved the above file and tried to assembled it into binary. However, it failed. The results were as follows: $ gcc -o eiz_ex eiz_ex.s -m32 eiz_ex.s: Assembler messages: eiz_ex.s:3: Error: bad register name '%eiz' eiz_ex.s:4...